Devices called FPGAs (Field Programmable Gate Arrays), PLDs (Programmable Logic Devices), and PLAs (Programmable Logic Arrays) are known as programmable devices where circuits can be reconfigured. Such programmable devices are fundamentally constructed by disposing units called logic cells or logic units in a lattice and disposing sets of wires so as to surround such units, with it being possible to change the functions of the logic cells or the connections of the wires based on information called context information or configuration information.
As one example of a technique for implementing parts of a logic circuit in FPGAs, Japanese Laid-Open Patent Publication No. 2000-40745 discloses a technique where an initial netlist that characterizes a logic circuit is divided into many pages and circuits for one of such pages are configured in an FPGA. By doing so, this technique aims to configure a much larger circuit than the physical capacity of the FPGA.
At present, system LSIs, which are mounted in multimedia devices, mobile devices, digital devices, and the like and execute much of the data processing of such devices, include a plurality of circuit units for realizing specific or dedicated functions (in many cases, such circuit units are called “hardware modules”, “IP” (Intellectual Property) or “libraries”) mounted on a single chip and such hardware modules carry out processing in parallel. Accordingly, if only a circuit is simply implemented in an FPGA using dividing, the ability of devices with reconfigure circuits has no great effect.